Updated CDTestFramework with the OPCODE Array SAP test.
Thanks Pierre Terdiman for the latest update.
This commit is contained in:
@@ -1,19 +1,3 @@
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/*
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* ICE / OPCODE - Optimized Collision Detection
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* http://www.codercorner.com/Opcode.htm
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*
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* Copyright (c) 2001-2008 Pierre Terdiman, pierre@codercorner.com
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This software is provided 'as-is', without any express or implied warranty.
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In no event will the authors be held liable for any damages arising from the use of this software.
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Permission is granted to anyone to use this software for any purpose,
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including commercial applications, and to alter it and redistribute it freely,
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subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you must not claim that you wrote the original software. If you use this software in a product, an acknowledgment in the product documentation would be appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
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3. This notice may not be removed or altered from any source distribution.
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*/
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///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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/**
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* Contains FPU related code.
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@@ -25,8 +9,8 @@ subject to the following restrictions:
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///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// Include Guard
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#ifndef __ICEFPU_H__
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#define __ICEFPU_H__
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#ifndef ICEFPU_H
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#define ICEFPU_H
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#define SIGN_BITMASK 0x80000000
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@@ -46,6 +30,12 @@ subject to the following restrictions:
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//! Don't use it blindly, it can be faster or slower than the FPU comparison, depends on the context.
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#define IS_NEGATIVE_FLOAT(x) (IR(x)&0x80000000)
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//! Checks 2 values have different signs
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inline_ BOOL DifferentSign(float f0, float f1)
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{
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return (IR(f0)^IR(f1))&SIGN_BITMASK;
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}
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//! Fast fabs for floating-point values. It just clears the sign bit.
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//! Don't use it blindy, it can be faster or slower than the FPU comparison, depends on the context.
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inline_ float FastFabs(float x)
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@@ -292,6 +282,46 @@ subject to the following restrictions:
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return Res;
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}
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//! A global function to find MAX(a,b,c,d) using FCOMI/FCMOV
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inline_ float FCMax4(float a, float b, float c, float d)
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{
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float Res;
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_asm fld [a]
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_asm fld [b]
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_asm fld [c]
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_asm fld [d]
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FCOMI_ST1
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FCMOVB_ST1
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FCOMI_ST2
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FCMOVB_ST2
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FCOMI_ST3
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FCMOVB_ST3
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_asm fstp [Res]
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_asm fcompp
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_asm fcomp
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return Res;
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}
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//! A global function to find MIN(a,b,c,d) using FCOMI/FCMOV
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inline_ float FCMin4(float a, float b, float c, float d)
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{
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float Res;
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_asm fld [a]
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_asm fld [b]
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_asm fld [c]
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_asm fld [d]
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FCOMI_ST1
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FCMOVNB_ST1
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FCOMI_ST2
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FCMOVNB_ST2
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FCOMI_ST3
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FCMOVNB_ST3
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_asm fstp [Res]
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_asm fcompp
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_asm fcomp
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return Res;
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}
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inline_ int ConvertToSortable(float f)
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{
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int& Fi = (int&)f;
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@@ -302,6 +332,32 @@ subject to the following restrictions:
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return Fi;
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}
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inline_ udword EncodeFloat(const float val)
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{
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// We may need to check on -0 and 0
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// But it should make no practical difference.
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udword ir = IR(val);
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if(ir & 0x80000000) //negative?
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ir = ~ir;//reverse sequence of negative numbers
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else
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ir |= 0x80000000; // flip sign
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return ir;
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}
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inline_ float DecodeFloat(udword ir)
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{
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udword rv;
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if(ir & 0x80000000) //positive?
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rv = ir & ~0x80000000; //flip sign
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else
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rv = ~ir; //undo reversal
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return FR(rv);
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}
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enum FPUMode
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{
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FPU_FLOOR = 0,
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@@ -330,4 +386,18 @@ subject to the following restrictions:
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FUNCTION ICECORE_API int intFloor(const float& f);
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FUNCTION ICECORE_API int intCeil(const float& f);
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#endif // __ICEFPU_H__
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inline_ sdword MyFloor(float f)
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{
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return (sdword)f - (IR(f)>>31);
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}
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class ICECORE_API FPUGuard
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{
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public:
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FPUGuard();
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~FPUGuard();
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private:
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uword mControlWord;
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};
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#endif // ICEFPU_H
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