Updated CDTestFramework with the OPCODE Array SAP test.

Thanks Pierre Terdiman for the latest update.
This commit is contained in:
erwin.coumans
2008-09-01 18:46:57 +00:00
parent f655eff89f
commit 932de57d4c
41 changed files with 6385 additions and 410 deletions

View File

@@ -1,19 +1,3 @@
/*
* ICE / OPCODE - Optimized Collision Detection
* http://www.codercorner.com/Opcode.htm
*
* Copyright (c) 2001-2008 Pierre Terdiman, pierre@codercorner.com
This software is provided 'as-is', without any express or implied warranty.
In no event will the authors be held liable for any damages arising from the use of this software.
Permission is granted to anyone to use this software for any purpose,
including commercial applications, and to alter it and redistribute it freely,
subject to the following restrictions:
1. The origin of this software must not be misrepresented; you must not claim that you wrote the original software. If you use this software in a product, an acknowledgment in the product documentation would be appreciated but is not required.
2. Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
3. This notice may not be removed or altered from any source distribution.
*/
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
/**
* Contains FPU related code.
@@ -25,8 +9,8 @@ subject to the following restrictions:
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// Include Guard
#ifndef __ICEFPU_H__
#define __ICEFPU_H__
#ifndef ICEFPU_H
#define ICEFPU_H
#define SIGN_BITMASK 0x80000000
@@ -46,6 +30,12 @@ subject to the following restrictions:
//! Don't use it blindly, it can be faster or slower than the FPU comparison, depends on the context.
#define IS_NEGATIVE_FLOAT(x) (IR(x)&0x80000000)
//! Checks 2 values have different signs
inline_ BOOL DifferentSign(float f0, float f1)
{
return (IR(f0)^IR(f1))&SIGN_BITMASK;
}
//! Fast fabs for floating-point values. It just clears the sign bit.
//! Don't use it blindy, it can be faster or slower than the FPU comparison, depends on the context.
inline_ float FastFabs(float x)
@@ -292,6 +282,46 @@ subject to the following restrictions:
return Res;
}
//! A global function to find MAX(a,b,c,d) using FCOMI/FCMOV
inline_ float FCMax4(float a, float b, float c, float d)
{
float Res;
_asm fld [a]
_asm fld [b]
_asm fld [c]
_asm fld [d]
FCOMI_ST1
FCMOVB_ST1
FCOMI_ST2
FCMOVB_ST2
FCOMI_ST3
FCMOVB_ST3
_asm fstp [Res]
_asm fcompp
_asm fcomp
return Res;
}
//! A global function to find MIN(a,b,c,d) using FCOMI/FCMOV
inline_ float FCMin4(float a, float b, float c, float d)
{
float Res;
_asm fld [a]
_asm fld [b]
_asm fld [c]
_asm fld [d]
FCOMI_ST1
FCMOVNB_ST1
FCOMI_ST2
FCMOVNB_ST2
FCOMI_ST3
FCMOVNB_ST3
_asm fstp [Res]
_asm fcompp
_asm fcomp
return Res;
}
inline_ int ConvertToSortable(float f)
{
int& Fi = (int&)f;
@@ -302,6 +332,32 @@ subject to the following restrictions:
return Fi;
}
inline_ udword EncodeFloat(const float val)
{
// We may need to check on -0 and 0
// But it should make no practical difference.
udword ir = IR(val);
if(ir & 0x80000000) //negative?
ir = ~ir;//reverse sequence of negative numbers
else
ir |= 0x80000000; // flip sign
return ir;
}
inline_ float DecodeFloat(udword ir)
{
udword rv;
if(ir & 0x80000000) //positive?
rv = ir & ~0x80000000; //flip sign
else
rv = ~ir; //undo reversal
return FR(rv);
}
enum FPUMode
{
FPU_FLOOR = 0,
@@ -330,4 +386,18 @@ subject to the following restrictions:
FUNCTION ICECORE_API int intFloor(const float& f);
FUNCTION ICECORE_API int intCeil(const float& f);
#endif // __ICEFPU_H__
inline_ sdword MyFloor(float f)
{
return (sdword)f - (IR(f)>>31);
}
class ICECORE_API FPUGuard
{
public:
FPUGuard();
~FPUGuard();
private:
uword mControlWord;
};
#endif // ICEFPU_H