(re)Enable SSE by default (using intrinsics) should compile fine under all Intel platforms.
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id0x1234
@@ -41,6 +41,9 @@ subject to the following restrictions:
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#define DBVT_USE_TEMPLATE 0
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#endif
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// Use only intrinsics instead of inline asm
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#define DBVT_USE_INTRINSIC_SSE 1
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// Using memmov for collideOCL
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#define DBVT_USE_MEMMOVE 1
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@@ -58,18 +61,18 @@ subject to the following restrictions:
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// Specific methods implementation
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//disabled by default, it breaks certain compilers and platforms (Intel compiler on Win32 and any compiler on Windows 64 bits)
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//#define WIN32_USE_SSE 1
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#ifdef WIN32_USE_SSE
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#define DBVT_PROXIMITY_IMPL DBVT_IMPL_SSE
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#ifdef WIN32
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#define DBVT_SELECT_IMPL DBVT_IMPL_SSE
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#define DBVT_MERGE_IMPL DBVT_IMPL_SSE
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#else
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#define DBVT_PROXIMITY_IMPL DBVT_IMPL_GENERIC
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#define DBVT_SELECT_IMPL DBVT_IMPL_GENERIC
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#define DBVT_MERGE_IMPL DBVT_IMPL_GENERIC
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#endif
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#if (DBVT_SELECT_IMPL==DBVT_IMPL_SSE)||(DBVT_MERGE_IMPL==DBVT_IMPL_SSE)
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#include <xmmintrin.h>
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#endif
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//
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// Auto config and checks
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//
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@@ -107,10 +110,6 @@ subject to the following restrictions:
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#error "DBVT_ENABLE_BENCHMARK undefined"
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#endif
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#ifndef DBVT_PROXIMITY_IMPL
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#error "DBVT_PROXIMITY_IMPL undefined"
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#endif
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#ifndef DBVT_SELECT_IMPL
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#error "DBVT_SELECT_IMPL undefined"
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#endif
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@@ -561,32 +560,8 @@ return(txmax>0);
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DBVT_INLINE btScalar Proximity( const btDbvtAabbMm& a,
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const btDbvtAabbMm& b)
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{
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#if DBVT_PROXIMITY_IMPL == DBVT_IMPL_SSE
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DBVT_ALIGN btScalar r[1];
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static DBVT_ALIGN const unsigned __int32 mask[]={0x7fffffff,0x7fffffff,0x7fffffff,0x7fffffff};
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__asm
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{
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mov eax,a
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mov ecx,b
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movaps xmm0,[eax]
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movaps xmm2,[ecx]
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movaps xmm1,[eax+16]
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movaps xmm3,[ecx+16]
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addps xmm0,xmm1
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addps xmm2,xmm3
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subps xmm0,xmm2
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andps xmm0,mask
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movhlps xmm1,xmm0
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addps xmm0,xmm1
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pshufd xmm1,xmm0,1
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addss xmm0,xmm1
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movss r,xmm0
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}
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return(r[0]);
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#else
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const btVector3 d=(a.mi+a.mx)-(b.mi+b.mx);
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return(btFabs(d.x())+btFabs(d.y())+btFabs(d.z()));
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#endif
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}
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//
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@@ -595,36 +570,57 @@ DBVT_INLINE int Select( const btDbvtAabbMm& o,
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const btDbvtAabbMm& b)
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{
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#if DBVT_SELECT_IMPL == DBVT_IMPL_SSE
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DBVT_ALIGN __int32 r[1];
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static DBVT_ALIGN const unsigned __int32 mask[]={0x7fffffff,0x7fffffff,0x7fffffff,0x7fffffff};
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__asm
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{
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mov eax,o
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mov ecx,a
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mov edx,b
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movaps xmm0,[eax]
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movaps xmm5,mask
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addps xmm0,[eax+16]
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movaps xmm1,[ecx]
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movaps xmm2,[edx]
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addps xmm1,[ecx+16]
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addps xmm2,[edx+16]
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subps xmm1,xmm0
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subps xmm2,xmm0
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andps xmm1,xmm5
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andps xmm2,xmm5
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movhlps xmm3,xmm1
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movhlps xmm4,xmm2
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addps xmm1,xmm3
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addps xmm2,xmm4
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pshufd xmm3,xmm1,1
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pshufd xmm4,xmm2,1
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addss xmm1,xmm3
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addss xmm2,xmm4
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cmpless xmm2,xmm1
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movss r,xmm2
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}
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return(r[0]&1);
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// TODO: the intrinsic version is 11% slower
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#if DBVT_USE_INTRINSIC_SSE
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__m128 omi(_mm_load_ps(o.mi));
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omi=_mm_add_ps(omi,_mm_load_ps(o.mx));
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__m128 ami(_mm_load_ps(a.mi));
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ami=_mm_add_ps(ami,_mm_load_ps(a.mx));
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ami=_mm_sub_ps(ami,omi);
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ami=_mm_and_ps(ami,_mm_load_ps((const float*)mask));
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__m128 bmi(_mm_load_ps(b.mi));
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bmi=_mm_add_ps(bmi,_mm_load_ps(b.mx));
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bmi=_mm_sub_ps(bmi,omi);
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bmi=_mm_and_ps(bmi,_mm_load_ps((const float*)mask));
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__m128 t0(_mm_movehl_ps(ami,ami));
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ami=_mm_add_ps(ami,t0);
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ami=_mm_add_ss(ami,_mm_shuffle_ps(ami,ami,1));
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__m128 t1(_mm_movehl_ps(bmi,bmi));
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bmi=_mm_add_ps(bmi,t1);
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bmi=_mm_add_ss(bmi,_mm_shuffle_ps(bmi,bmi,1));
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return(_mm_cmple_ss(bmi,ami).m128_u32[0]&1);
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#else
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DBVT_ALIGN __int32 r[1];
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__asm
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{
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mov eax,o
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mov ecx,a
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mov edx,b
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movaps xmm0,[eax]
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movaps xmm5,mask
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addps xmm0,[eax+16]
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movaps xmm1,[ecx]
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movaps xmm2,[edx]
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addps xmm1,[ecx+16]
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addps xmm2,[edx+16]
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subps xmm1,xmm0
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subps xmm2,xmm0
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andps xmm1,xmm5
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andps xmm2,xmm5
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movhlps xmm3,xmm1
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movhlps xmm4,xmm2
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addps xmm1,xmm3
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addps xmm2,xmm4
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pshufd xmm3,xmm1,1
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pshufd xmm4,xmm2,1
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addss xmm1,xmm3
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addss xmm2,xmm4
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cmpless xmm2,xmm1
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movss r,xmm2
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}
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return(r[0]&1);
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#endif
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#else
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return(Proximity(o,a)<Proximity(o,b)?0:1);
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#endif
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@@ -636,20 +632,14 @@ DBVT_INLINE void Merge( const btDbvtAabbMm& a,
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btDbvtAabbMm& r)
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{
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#if DBVT_MERGE_IMPL==DBVT_IMPL_SSE
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__asm
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{
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mov eax,a
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mov edx,b
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mov ecx,r
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movaps xmm0,[eax+0]
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movaps xmm1,[edx+0]
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movaps xmm2,[eax+16]
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movaps xmm3,[edx+16]
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minps xmm0,xmm1
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maxps xmm2,xmm3
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movaps [ecx+0],xmm0
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movaps [ecx+16],xmm2
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}
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__m128 ami(_mm_load_ps(a.mi));
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__m128 amx(_mm_load_ps(a.mx));
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__m128 bmi(_mm_load_ps(b.mi));
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__m128 bmx(_mm_load_ps(b.mx));
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ami=_mm_min_ps(ami,bmi);
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amx=_mm_max_ps(amx,bmx);
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_mm_store_ps(r.mi,ami);
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_mm_store_ps(r.mx,amx);
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#else
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for(int i=0;i<3;++i)
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{
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@@ -1098,7 +1088,9 @@ if(root)
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#undef DBVT_IPOLICY
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#undef DBVT_CHECKTYPE
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#undef DBVT_IMPL_GENERIC
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#undef DBVT_IMPL_FPU0x86
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#undef DBVT_IMPL_SSE
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#undef DBVT_USE_INTRINSIC_SSE
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#undef DBVT_SELECT_IMPL
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#undef DBVT_MERGE_IMPL
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#endif
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