added updated version of simdmathlibrary-1.0.1
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Extras/simdmathlibrary/spu/simdmath/llroundd2.h
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Extras/simdmathlibrary/spu/simdmath/llroundd2.h
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/* llroundd2 - rounds two doubles in to two nearest 64bit integer.
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0.5 will be rounded to far from 0
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Copyright (C) 2006, 2007 Sony Computer Entertainment Inc.
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All rights reserved.
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Redistribution and use in source and binary forms,
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with or without modification, are permitted provided that the
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following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the Sony Computer Entertainment Inc nor the names
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of its contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef ___SIMD_MATH_LLROUNDD2_H___
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#define ___SIMD_MATH_LLROUNDD2_H___
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#include <simdmath.h>
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#include <spu_intrinsics.h>
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//
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// Handles no exception
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// over flow will return unspecified data
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static inline vector signed long long
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_llroundd2 (vector double in)
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{
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int shift0, shift1;
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vec_uchar16 splat_msb = { 0,0,0,0,0,0,0,0, 8,8,8,8,8,8,8,8};
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vec_int4 exp;
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vec_uint4 mant, mant0, mant1, sign, mask, borrow, addend;
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vec_uint4 implied_one = { 0, 0, 0x00100000, 0};
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vec_uint4 exp_mask = { -1, -1,0xFFF00000, 0};
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/* Determine how many bits to shift the mantissa to correctly
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* align it into long long element 0.
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*/
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exp = spu_and(spu_rlmask((vec_int4)in, -20), 0x7FF);
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exp = spu_add(exp, -1011);
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shift0 = spu_extract(exp, 0);
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shift1 = spu_extract(exp, 2);
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mask = spu_cmpgt(exp, 0);
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mask = spu_shuffle(mask, mask, splat_msb);
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/* Algn mantissa bits
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*/
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mant0 = spu_sel(spu_rlmaskqwbyte((vec_uint4)in, -8), implied_one, exp_mask);
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mant1 = spu_sel((vec_uint4)in, implied_one, exp_mask);
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mant0 = spu_slqwbytebc(spu_slqw(mant0, shift0), shift0);
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mant1 = spu_slqwbytebc(spu_slqw(mant1, shift1), shift1);
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mant = spu_shuffle(mant0, mant1, ((vec_uchar16){0,1,2,3,4,5,6,7, 16,17,18,19,20,21,22,23}));
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mant = spu_and(mant, mask);
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/* Perform round by adding 1 if the fraction bits are
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* greater than or equal to .5
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*/
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addend = spu_shuffle(mant0, mant1, ((vec_uchar16){0x80,0x80,0x80,0x80,0x80,0x80,0x80,8, 0x80,0x80,0x80,0x80,0x80,0x80,0x80,24}));
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addend = spu_rlmask(addend, -7);
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// addend = spu_and(spu_rlqw(mant, 1), ((vec_uint4){ 0,1,0,1}));
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mant = spu_addx(mant, addend, spu_rlqwbyte(spu_genc(mant, addend), 4));
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/* Compute the two's complement of the mantissa if the
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* input is negative.
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*/
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sign = (vec_uint4)spu_rlmaska((vec_int4)in, -31);
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sign = spu_shuffle(sign, sign, splat_msb);
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mant = spu_xor(mant, sign);
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borrow = spu_genb(mant, sign);
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borrow = spu_shuffle(borrow, borrow, ((vec_uchar16){
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4,5,6,7, 192,192,192,192,
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12,13,14,15, 192,192,192,192}));
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mant = spu_subx(mant, sign, borrow);
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return ((vec_llong2)(mant));
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}
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#endif
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