77 lines
3.3 KiB
C
77 lines
3.3 KiB
C
/* nearbyintd2 - Round the input to the nearest integer according to
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the current rounding mode without raising an inexact exception.
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Copyright (C) 2006, 2007 Sony Computer Entertainment Inc.
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All rights reserved.
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Redistribution and use in source and binary forms,
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with or without modification, are permitted provided that the
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following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the Sony Computer Entertainment Inc nor the names
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of its contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef ___SIMD_MATH_NEARBYINTD2_H___
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#define ___SIMD_MATH_NEARBYINTD2_H___
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#include <simdmath.h>
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#include <spu_intrinsics.h>
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static inline vector double
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_nearbyintd2(vector double in)
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{
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vec_uint4 fpscr;
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vec_ullong2 sign = ((vec_ullong2){0x8000000000000000ULL,0x8000000000000000ULL});
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vec_double2 out, addend;
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vec_uint4 vec_zero = ((vec_uint4){0,0,0,0});
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fpscr = spu_mffpscr();
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// check denormalized
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vec_uint4 exp = spu_and( (vec_uint4)in, 0x7FF00000 );
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vec_uint4 is_denorm = spu_cmpeq( exp, 0 );
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vec_uint4 ofs = spu_and( ((vec_uint4){0x00100000,0,0x00100000,0}), is_denorm);
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// check zero
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vec_uint4 abs_x = spu_and((vec_uint4)in, ((vec_uint4){0x7FFFFFFF,-1,0x7FFFFFFF,-1}));
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vec_uint4 is_zerox = spu_cmpeq( abs_x, vec_zero);
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is_zerox = spu_and( is_zerox, spu_shuffle(is_zerox,is_zerox, ((vec_uchar16){4,5,6,7,0,1,2,3,12,13,14,15,8,9,10,11})));
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ofs = spu_sel( ofs, vec_zero, is_zerox);
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vec_double2 xx = (vec_double2)spu_or( (vec_uint4)in, ofs );
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/* Add 2^53 and then subtract 2^53 to affect a round to be performed by the
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* hardware. Also preserve the input sign so that negative inputs that
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* round to zero generate a -0.0.
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*/
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vec_uint4 is_large = spu_cmpgt( exp, 0x43200000 );
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is_large = spu_shuffle(is_large,is_large,((vec_uchar16){0,0,0,0,0,0,0,0,8,8,8,8,8,8,8,8}));
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addend = spu_sel((vec_double2)((vec_ullong2){0x4330000000000000ULL,0x4330000000000000ULL}), ((vec_double2){0.0,0.0}), (vec_ullong2)is_large);
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addend = spu_sel(addend, xx, sign);
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out = spu_sel(spu_sub(spu_add(xx, addend), addend), xx, sign);
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spu_mtfpscr(fpscr);
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return (out);
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}
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#endif
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