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bullet3/Extras/software_cache/cache/include/README
erwin.coumans dc8692ba94 Added IBM Cell SDK 2.x software_cache to Bullet/Extras. There is an option to enable it for the BulletMultiThreaded Cell version.
See USE_SOFTWARE_CACHE in Bullet\src\BulletMultiThreaded\SpuNarrowPhaseCollisionTask\SpuGatheringCollisionTask.cpp
It improves the Bullet midphase collision detection (triangle/vertex fetch)
The license is CommonPublicLicense-1.0, see included license docs.
2008-11-18 01:33:30 +00:00

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%% ---------------------------------------------------------------
%% PLEASE DO NOT MODIFY THIS SECTION
%% This prolog section is automatically generated.
%%
%% (C) Copyright 2001,2006,
%% International Business Machines Corporation,
%%
%% All Rights Reserved.
%% ---------------------------------------------------------------
%% PROLOG END TAG zYx
This directory contains implementation of software managed cache for
SPE. Whenever possible, the cache interfaces are implemented as macros
or inline-able functions.
Depending on compile-time settings, different cache implementations can
be selected.
The include file heirarchy is:
+ spe_cache.h Top level header.
|
+ defs.h Common definitions.
+ dma.h Initiate DMA transfers.
+ nway.h Top level n-way header.
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+ nway-lookup.h n-way lookup operations.
+ nway-miss.h n-way cache miss handler.
+ nway-replace.h n-way cache replace handler.
+ nway-opt.h "optimized" n-way interfaces.
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+ api.h Basic application interfaces.