150 lines
4.5 KiB
C++
150 lines
4.5 KiB
C++
//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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// * Neither the name of NVIDIA CORPORATION nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
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// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Copyright (c) 2008-2019 NVIDIA Corporation. All rights reserved.
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#ifndef PXCUDACONTEXTMANAGER_PXGPUCOPYDESCQUEUE_H
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#define PXCUDACONTEXTMANAGER_PXGPUCOPYDESCQUEUE_H
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#include "foundation/PxPreprocessor.h"
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#if PX_SUPPORT_GPU_PHYSX
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#include "foundation/PxAssert.h"
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#include "task/PxTaskDefine.h"
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#include "task/PxGpuDispatcher.h"
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#include "cudamanager/PxGpuCopyDesc.h"
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#include "cudamanager/PxCudaContextManager.h"
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/* forward decl to avoid including <cuda.h> */
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typedef struct CUstream_st* CUstream;
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namespace physx
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{
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PX_PUSH_PACK_DEFAULT
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/// \brief Container class for queueing PxGpuCopyDesc instances in pinned (non-pageable) CPU memory
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class PxGpuCopyDescQueue
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{
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public:
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/// \brief PxGpuCopyDescQueue constructor
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PxGpuCopyDescQueue(PxGpuDispatcher& d)
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: mDispatcher(d)
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, mBuffer(0)
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, mStream(0)
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, mReserved(0)
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, mOccupancy(0)
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, mFlushed(0)
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{
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}
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/// \brief PxGpuCopyDescQueue destructor
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~PxGpuCopyDescQueue()
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{
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if (mBuffer)
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{
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mDispatcher.getCudaContextManager()->getMemoryManager()->free(PxCudaBufferMemorySpace::T_PINNED_HOST, (size_t) mBuffer);
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}
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}
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/// \brief Reset the enqueued copy descriptor list
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///
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/// Must be called at least once before any copies are enqueued, and each time the launched
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/// copies are known to have been completed. The recommended use case is to call this at the
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/// start of each simulation step.
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void reset(CUstream stream, uint32_t reserveSize)
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{
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if (reserveSize > mReserved)
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{
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if (mBuffer)
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{
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mDispatcher.getCudaContextManager()->getMemoryManager()->free(
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PxCudaBufferMemorySpace::T_PINNED_HOST,
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(size_t) mBuffer);
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mReserved = 0;
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}
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mBuffer = (PxGpuCopyDesc*) mDispatcher.getCudaContextManager()->getMemoryManager()->alloc(
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PxCudaBufferMemorySpace::T_PINNED_HOST,
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reserveSize * sizeof(PxGpuCopyDesc),
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PX_ALLOC_INFO("PxGpuCopyDescQueue", GPU_UTIL));
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if (mBuffer)
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{
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mReserved = reserveSize;
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}
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}
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mOccupancy = 0;
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mFlushed = 0;
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mStream = stream;
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}
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/// \brief Enqueue the specified copy descriptor, or launch immediately if no room is available
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void enqueue(PxGpuCopyDesc& desc)
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{
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PX_ASSERT(desc.isValid());
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if (desc.bytes == 0)
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{
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return;
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}
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if (mOccupancy < mReserved)
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{
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mBuffer[ mOccupancy++ ] = desc;
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}
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else
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{
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mDispatcher.launchCopyKernel(&desc, 1, mStream);
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}
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}
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/// \brief Launch all copies queued since the last flush or reset
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void flushEnqueued()
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{
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if (mOccupancy > mFlushed)
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{
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mDispatcher.launchCopyKernel(mBuffer + mFlushed, mOccupancy - mFlushed, mStream);
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mFlushed = mOccupancy;
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}
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}
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private:
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PxGpuDispatcher& mDispatcher;
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PxGpuCopyDesc* mBuffer;
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CUstream mStream;
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uint32_t mReserved;
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uint32_t mOccupancy;
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uint32_t mFlushed;
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void operator=(const PxGpuCopyDescQueue&); // prevent a warning...
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};
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PX_POP_PACK
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} // end physx namespace
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#endif // PX_SUPPORT_GPU_PHYSX
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#endif // PXCUDACONTEXTMANAGER_PXGPUCOPYDESCQUEUE_H
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